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rev. 0.1 4/09 copyright ? 2009 by silicon laboratories c8051f540dk c8051f540dk c8051f540 d evelopment k it u ser ? s g uide 1. relevant devices the c8051f540 development kit is intended as a development platform for the microcontrollers in the c8051f54x mcu family. the members of this mcu family are: c8051f540, c8051f541, c8051f542, c8051f543, c8051f544, c8051f545, c8051f546, and c8051f547. ? the target board included in this kit is provided with a pre-soldered c8051f540 mcu (qfn32 package) and a c8051f542 (qfn24 package). ? code developed on the c8051f540 can be easily ported to the other members of this mcu family. ? refer to the c8051f54x data sheet for the differ ences between the member s of this mcu family. 2. kit contents the c8051f540 development kit contains the following items: ? c8051f540 target board ? c8051fxxx development kit quick-start guide ? silicon laboratories id e and product information cd-rom. cd content includes the following: ?? silicon laboratories integrated development environment (ide) ?? keil 8051 development tools (macro assembler, linker, evaluation c compiler) ?? source code examples and register definition files ?? documentation ?? c8051f540 development kit user?s guide (this document) ? optional third party tools cd ? ac to dc power adapter ? usb debug adapter (usb to debug interface) ? two usb cables 3. hardware setup refer to figure 1 for a diagram of the hardware configuration. 1. connect the usb debug adapter to the debug a connecto r on the target board with the 10-pin ribbon cable. 2. connect one end of the usb cable to the usb connector on the usb debug adapter. 3. verify that shorting blocks are installed on the target board as shown in figure 4 on page 9. 4. connect the other end of the usb cable to a usb port on the pc. 5. connect the ac/dc power adapter to power jack p1 on the target board. notes: ?use the reset icon in the ide to reset the target when connected during a debug session. ? remove power from the target board and the usb de bug adapter before connecting or disconnecting the ribbon cable from the target board. connecting or disconnecting the cable when the devices have power can damage the device and/or the usb debug adapter.
c8051f540dk 2 rev. 0.1 figure 1. hardware setup using a usb debug adapter 4. software installation the included cd-rom contains the silicon labs inte grated development environm ent (ide), evaluation 8051 tools, optional software utilities, and additional documentation. insert the cd-rom into your pc?s cd-rom drive. an installer will automatically launch, a llowing you to install the ide software or read documentation by clicking buttons on the installation panel. if the installer does not automatically start when you insert the cd-rom, run autorun.exe found in the root directory of the cd-rom. refer to the releasenotes.txt file on the cd-rom for the latest information regarding kn own problems and restrictions. 4.1. system requirements the following are the system requirements necessary to run the debug and programming tools: ? pentium-class host pc running microsoft windows 2000 or newer. ? one available usb port. 4.2. development tools installation to install the ide, utilit ies, and code examples, perform the following steps: 1. click on the "install development tools" button on the installation ut ility's startup screen. 2. in the kit selection box that appears, choose the c8 051f540dk development kit from the list of options. 3. in the next screen, choose ?components to be installed?. the programs necessary to download and debug on the mcu are the silicon labs ide and the keil 8051 evaluation toolset . the cp210x drivers are necessary to use the uart capabilities of the target board. see section 4.3. for more info rmation about installing the cp210x drivers. 4. installers selected in step 3 will execute in sequen ce, prompting the user as they install programs, documentation, and drivers. p1 p5 C8051F540-TB p1.4_b p1.4_a port 0 ?a? j1 port 2 ?a? j3 port 1 ?a? j2 +lin_v lin_out gnd debug_a p2 r22 side ?a? side ?b? debug_b p3 tb3 reset_a reset_b silicon labs www.silabs.com ds2 ds3 ds1 j13 j16 j17 j18 p4 j10 j9 j12 port 0 ?b? j5 port 1 ?b? j6 j4 f542 u2 c8051 f540 u1 j32 j7 port 2 ?b? j11 j15 j8 j14 comm ds1 p1.3_a pwr led p1.3_b cp 2102 lin lin usb cable ac/dc adapter target board silicon laboratories usb debug adapter run stop power usb debug adapter tb1
c8051f540dk rev. 0.1 3 4.3. cp210x usb to uart vcp driver installation the c8051f540 target board includes a silicon labo ratories cp2102 usb-to-uar t bridge controller. device drivers for the cp2102 need to be installed before pc software such as hyperterminal can communicate with the target board over the usb connection. if the "install cp210x drivers" option is selected during installation, a driver ?unpacker? ut ility will launch. 1. follow the steps to copy the driver files to the desired location. the default directory is c:\silabs\mcu\cp210x . 2. the final window will give an op tion to install th e driver on the target system. select the ?launch the cp210x vcp driver installer? option if you are ready to install the driver. 3. if selected, the driver installer will now launch, providing an option to specify the driver installation location. after pre ssing the ?install? button, the installer will search your system for copies of previously installe d cp210x virtual com port drivers. it will let you know when your system is up to date. the driver files included in this in stallation have been certified by microso ft. 4. if the ?launch the cp210x vcp driver installer? option was not selected in step 3, the installer can be found in the location specified in step 2, by default c:\silabs\mcu\cp210x\windows_2k_xp_s2k3_vista . at this location, run cp210xvcpinstaller.exe . 5. to complete the installation process, connect the included usb cable between the host computer and the usb connector (p5) on the c8051f540 target board. windows will automatically finish the driver installation. information windows will pop up from the taskbar to show the installation progress. 6. if needed, the driver files can be unin stalled by selecting ?silicon laboratorie s cp210x usb to uart bridge driver removal? option in the ?add or remove programs? window. 5. software overview the following software is necessary to build a project, download code to, and communicate with the target microcontroller. ? silicon labs integr ated development environment (ide) ? 8051 toolset other useful software that is provided on th e development kit cd and th e silicon labs downloads (www.silabs.com/mcudownloads) website includes the following: ? configuration wizard 2 ? keil vision2 and vision3 drivers ? mcu production programmer a nd flash programming utilities 5.1. silicon labs ide the silicon labs ide integr ates a source-code editor, source-level debugger and in-system programmer. the use of third-party compilers, assemblers, and linkers is al so supported. this development kit includes evaluation versions of commercial c compilers and assemblers which can be used from within the silicon labs ide. 5.1.1. third party toolsets the silicon labs ide has nat ive support for many 8051 compilers. natively-supp orted tools ar e as follows: ? keil ? iar ? raisonance ? tasking ? hi-tech ? sdcc specific instructions for integrating each of the supported tools can be found in the application notes section of the cd, or on the silicon labs w eb site (http://www.silabs.com).
c8051f540dk 4 rev. 0.1 5.1.2. getting started with the silicon labs ide the following sections discuss how to open an example proj ect in the ide, build the source code, and download it to the target device. 5.1.2.1. running the f540_blinky example program the f540_blinky example program blinks an led on the target board. 1. open the silicon labs ide from the start menu. 2. select project ? open project to open an existing project. 3. browse to the c:\silabs\mcu\examples\c8051f54x\blinky directory (default) and select the f540_blinky_c.wsp project file and click open . 4. once the project is open, build the project by clicking on the build/make project button in the toolbar or selecting project ? build/make project from the menu. note: after the project has been built the first time, the build/make project command will only build the files that have been changed since the previous build . to rebuild all files and project dependencies, click on the rebuild all button in the toolbar or select project ? rebuild all from the menu. 5. before connecting to the target device, several co nnection options may need to be set. open the connec- tion options window by selecting options ? connection options... in the ide menu. first, select the ?usb debug adapter? option. next, the correct ?debug interface? must be selected. c8051f54x devices use silicon labs ? c2 ? 2-wire debug interface. once all the selections are made, click the ok button to close the window. 6. click the connect button in the toolbar or select debug ? connect from the menu to connect to the device. 7. download the project to the target by clicking the download code button in the toolbar. note: to enable automatic downloading if the program build is successful select enable automatic con- nect/download after build in the project ? target build configuration dialog. if errors occur during the build process, the ide will not attempt the download. 8. click on the go button (green circle) in the toolbar or by selecting debug ? go from the menu to start run- ning the firmware. the led on the target board will start blinking. 5.1.2.2. creating a new project use the following steps to create a new projects. once steps 1-5 in this section are complete, continue at step 3 in section 5.1.2.1. 1. select project ? new project to open a new project and reset all configuration settings to default. 2. select file ? new file to open an editor window. create your source file(s) and save the file(s) with a rec- ognized extension, such as .c, .h, or .asm, to enable color syntax highlighting. 3. right-click on ?new project? in the project window . select add files to project . select files in the file browser and click open. continue adding files until all project files have been added. 4. for each of the files in the project window that you want assembled, compiled and linked into the target build, right-click on th e file name and select add file to build . each file will be as sembled or compiled as appropriate (based on file extension) and linke d into the build of the absolute object file. note: if a project contains a large number of files, the ?group? feature of the ide can be used to organize. right-click on ?new project? in the project window . select add groups to project . add pre-defined groups or add customized groups. right-click on the group name and choose add file to group . select files to be added. continue adding files until all project files have been added. 5. save the project when finished with the debug session to preserve the current target build configuration, editor settings and the location of all open debug views. to save the project, select project ? save project as... from the menu. create a new name for the project and click on save .
c8051f540dk rev. 0.1 5 5.2. configuration wizard 2 the configuration wizard 2 is a code g eneration tool fo r all of the silicon laboratories devices. code is generated through the use of dialog boxes for each of the device's peripherals. figure 2. configuration wizard 2 utility the configuration wizard 2 utility help s accelerate development by automati cally generating initialization source code to configure and enable the on-chip resources needed by most design projects. in just a few steps, the wizard creates complete startup code for a sp ecific silicon laboratories mcu. the pr ogram is configurabl e to provide the output in c or assembly. for more information, please refe r to the configuration wizard 2 help available under the help menu in configuration wizard 2. for more information, please refer to the configuration wizard 2 documentation. the documentation and software are available from the downloads webpage ( www.silabs.com/mcudownloads ). 5.3. keil uvision2 and uvisi on3 silicon labor atories drivers as an alternative to the s ilicon laboratories id e, the vision debu g driver allows th e keil vision ide to communicate with silicon labo ratories on-chip debug logi c. in-system flash memory programming in tegrated into the driver allows for rapidly updating target code. the vision ide can be used to start and stop program execution, set breakpoints, check variables, inspect and modify memory contents, and single-step through programs running on the actual target hardware. for more information, please refer to the uvision driver documentation. the documentation and software are available from the downloads webpage ( www.silabs.com/mcudownloads ).
c8051f540dk 6 rev. 0.1 5.4. programming utilities the silicon labs ide is the primary tool for downloadi ng firmware to the mcu during development. there are two software programming tools that are intended for use du ring prototyping or in the field: the mcu production programmer and the flash programming utilities. the mcu production programmer is installed with the ide to the directory c:\silabs\mcu\utilities\pr oduction programmer\ (d efault). the flash pr ogramming utilities can be optionally installed from the cd an d is installed to c:\silabs\mcu\ut ilities\flash progra mming\ (default). 6. exampl e source code example source code and register definition files are provided in the ? silabs\mcu\examples\c8051f54x\ ? directory during ide installation. these files may be us ed as a template for code development. the comments in each example file indicate which development tool chains were used when testing. example applications include a blinking led example which configures the green led on the target board to blink at a fixed rate. also included are examples for each of peripherals of the mcu, such as the uart. 6.1. register definition files register definition files c8051f540.inc, c8051f540_defs.h and compiler_defs.h define all sfr registers and bit- addressable control/status bits. these files are installed into the ? silabs\mcu\examples\c8051f54x\header_files\ ? directory during ide installation. the register and bit names are identical to those used in the c8051f54x data sheet. 6.2. blinking led example the example source files f540_blinky.asm and f540_blinky.c installed in the default directory ? silabs\mcu\examples\c8051f54x\blinky ? show examples of several basic c8051f540 functions. these include disabling the watchdog timer (wdt), configuring the port i /o crossbar, configuring a timer for an interrupt routine, initializing the system clock, and conf iguring a gpio port pin. when compile d/assembled and linked, this program flashes the green led on the c8051f540 target board a bout five times a second using the interrupt handler with a c8051f540 timer.
c8051f540dk rev. 0.1 7 7. target board the c8051f540 development kit includes a target board with a c8051f540 (side a) and c8051f542 (side b) device pre-installed for evaluation and preliminary software development. numerous input/output (i/o) connections are provided to facilitate prototyping us ing the target board. refer to figure 3 for the locations of the various i/o connectors. figure 4 on page 9 shows the factory default shorting block positions. a summary of the signal names and headers is provided in table 9 on page 15. p4 header to choose between +5v from debug adapter (p2) or +5v from on-board regulator (u4) j18 connect v_high node from tb1 lin header to +5v regulator input for board power p1 power connector (accepts input from 7 to 15 vdc unregulated power adapter) p5 usb connector (connects to pc for serial communication) tb1 shared lin connector for side a and b mcus for external nodes j1-j3 side a: port 0 through port 2 headers j8 side a: connects +5v net to vio and vregin of the mcu j9, j10 side a: external crystal enable connectors j13 side a: connects decoupling capacitors c28 and c29 for mcu vref (p0.0) j15 side a: connects vio to vio_a_src wh ich powers the r22 potentiometer, the rst_a pin pull-up, and p1.4_a switch pull-up. j16 side a: connects p1.3_a led and p1.4_a switch to mcu port pins j17 side a: connects mcu to two separate transceivers (uart(u3), and lin(t2)) j20 side a: connects r27 potentiometer to port pin 1.2 p2 side a: debug connector for debug adapter interface tb3 side a: power supply terminal block j4 side b: connects +5v net to vio and vregin of the mcu j5-7 side b: port 0 through port 2 headers j11 side b: connects p1.3_b led and p1.4_b switch to mcu port pins j12 side b: connects mcu to lin transceiver (t1) j19 side b: connects decoupling capacitors c41 and c42 for mcu vref (p0.0) p3 side b: debug connector for debug adapter interface
c8051f540dk 8 rev. 0.1 figure 3. c8051f540 target board with pin numbers p1 p5 C8051F540-TB p1.4_b p1.4_a port 0 ?a? j1 port 2 ?a? j3 port 1 ?a? j2 +lin_v lin_out gnd debug_a p2 r22 side ?a? side ?b? debug_b p3 tb3 reset_a reset_b silicon labs www.silabs.com ds2 ds3 ds1 j13 j16 j17 j18 p4 j10 j9 j12 port 0 ?b? j5 port 1 ?b? j6 j4 f542 u2 c8051 f540 u1 j19 j7 port 2 ?b? j11 j15 j8 j14 comm ds1 p1.3_a pwr led p1.3_b cp 2102 lin lin 2 2 2 2 2 1 1 1 1 1 1 2 1 1 1 1 1 1 2 2 2 2 1 1 2 2 1 tb1
c8051f540dk rev. 0.1 9 7.1. target board shorti ng blocks: factory defaults the c8051f540 target board comes from the factory with pre-installed shorting blocks on many headers. figure 4 shows the positions of the factory default shorting blocks. figure 4. c8051f540 target board shorting blocks: factory defaults p1 p5 C8051F540-TB p1.4_b p1.4_a port 0 ?a? j1 port 2 ?a? j3 port 1 ?a? j2 +lin_v lin_out gnd debug_a p2 r22 side ?a? side ?b? debug_b p3 tb3 reset_a reset_b silicon labs www.silabs.com ds2 ds3 ds1 j13 j16 j17 j18 p4 j10 j9 j12 port 0 ?b? j5 port 1 ?b? j6 j4 f542 u2 c8051 f540 u1 j19 j7 port 2 ?b? j11 j15 j8 j14 comm ds1 p1.3_a pwr led p1.3_b cp 2102 lin lin tb1
c8051f540dk 10 rev. 0.1 7.2. target board power options and current measurem ent (j4, j8, j24, p1, tb1) the mcus on the c8051f540 target board are powered from a +5 v net. the +5 v net is connected to the headers j8 (side a) and j4 (side b). shorting blocks can be put on each header to connect the +5 v net to the vregin and vio pins on the two mcus . with the shorting blocks removed, a source meter can be used across the headers to measure the current consumption of the mcu. the +5 v net on the target board has three possible sources: 1. 12 v dc power using the ac to dc power adapter (p1) 2. 5 v dc usb vbus power from pc via the usb debug adapter (debug_a) 3. 12 v dc power from the lin external header (tb1) 7.2.1. using the ac to dc power adapter as the target board power source (p1, p4) the default configuration of the target board uses the ac to dc power adap ter as the source. the 12 v from the adapter is regulated to +5 v using an ldo regulator (u4). t he output of the regulator is connected to the +5 v net of the target board through the p4 header. a shorting block should be installed on pins p4[2?3] for this purpose. the +5 v net powers the mcus. 7.2.2. using the usb debug adapter as the target board power source (p4) the target board can use +5 v provided by the usb debug ad apter. to enable this source, a shorting block should be installed on pins p4[1-2]. with this shorting block, th e output of the ldo regulator (u4) is disconnected from the +5 v net of the target board, and the ser_pwr node is connected to +5 v. note: the usb debug adapter does not provide the necessary peak power for the can transceivers to operate. one of the 12 v dc sources is reco mmended for can transceiver operation. 7.2.3. using an external +12v lin source as the target board power source (p4, tb1) the two 12 v power sources (lin and ac to dc power adapt er) are ored together using reverse-biased diodes (z1 and z2) and connected to the input of the ldo regulator (u 6). the output of the regulator is connected to the +5 v net of the target board through the p4 header. a shorting block should be installed on pins p4[2-3] for this purpose. the +5 v net powers the mcus directly. 7.3. system clo ck sources (j9, j10) 7.3.1. internal oscillators the c8051f540 and c8051f542 devices installed on the ta rget board feature a factory-calibrated, programmable high-frequency internal oscilla tor (24 mhz base frequency, 0.5%), which is enabled as the s ystem clock source on reset. after reset, the internal oscillato r operates at a frequency of 187.5 khz by default but may be configured by software to operate at other frequencies. the on-chip cr ystal is accurate for lin master communications and in many applications an external oscilla tor is not required. however, if you wish to operate th e c8051f540 device (side a) at a frequency not available with the internal o scillator, an external crystal may be used. refer to the c8051f54x data sheet for more information on configuring the system clock source. 7.3.2. external oscillator options the target board is designed to facilitat e the installation of an external crys tal. remove shorti ng blocks at headers j9 and j10 and install the crystal at the pads marked y1. install a 10 m ? resistor at r2 and install capacitors at c7 and c8 using values appropriate for the crystal you select. if you wish to operate the exte rnal oscillator in capacitor or rc mode, options to install a capacitor or an rc network are also available on the target board. r2, r3, c7, and c8 are located on the back side of the board, near the side a mcu. populate c7 for capacitor mode, and populate r3 and c7 for rc mode. refer to the c8051f54x data sheet for more information on the use of external oscillators.
c8051f540dk rev. 0.1 11 7.4. switches and leds (j11, j16) two push-button switches are provided on the target board for ea ch mcu. switch reset_a is connected to the rst pin of the c8051f540. switch reset_b is connected to the rst pin of the c8051f542. pressing reset_a puts the c8051f540 device into its hardware-reset state, and sim ilarly for reset_b an d the c8051f542 mcu. switches p1.4_a and p1.4_b are connected to the mc u?s general purpose i/o (gpio) pins through headers. pressing either one of these switches generates a logic low signal on the port pin. remove the shorting block from the header to disconnect these swit ches from the port pins. see table 1 for the port pins and headers corresponding to each switch. four leds are provided on the target board to serve as indicators. the red led labeled pwr indicates presence of power to the target board. the second red led la beled comm indicates if the cp2102 usb-to-uart bridge is recognized by the pc. the green led on side a is labe led with port pin name and is connected to a c8051f580 gpio pin through a header. remove the shorting block from the header to disconnect the led from the port pin. similarly, a second green led on side b is connected to the c8051f542 through another header. see table 1 for the port pins and headers corresponding to each led. 7.5. target board de bug interfaces (p2 and p3) the debug connectors p2 (debug_a) and p3 (debug_b) provide access to the debug (c2) pins of the c8051f540 and c8051f542. the debug connectors are used to connect the serial adapter or the usb debug adapter to the target board for in-circuit debugging and flash programming. table 2 shows the debug pin definitions. table 1. target board i/o descriptions description i/o header(s) reset_a reset (side a) none reset_b reset (side b) none p1.4_a switch p1.4 (side a) j16[1?2] p1.4_b switch p1.4 (side b) j11[1?2] p1.3_a led p1.3 (side a) j16[3?4] p1.3_b led p1.3 (side b) j11[3?4] red led (pwr) power none red led (comm) comm active none table 2. debug connector pin descriptions side a - c8051f540 side b - c8051f542 pin # description pin # description 1 not connected 1 not connected 2, 3, 9 gnd (ground) 2, 3, 9 gnd (ground) 4 p2.1_c2d_a 4 p2.1_c2d_b 5r s t _ a (reset) 5 rst_b (reset) 6p2.1 6p2.1_b 7rst /c2ck_a 7 rst /c2ck_b 8 not connected 8 not connected 10 usb power (+5vdc from p2) 10 not connected
c8051f540dk 12 rev. 0.1 7.6. serial interface (p5, j14) a usb-to-uart bridge device (u3) and usb connector (p5) are provided on the target board to facilitate serial connections to uart0 of t he c8051f540 (side a). the silicon labs cp2102 usb-to -uart bridge provides data connectivity between the c8051f540 and the pc via a usb port. the tx and rx signals of uart0 may be connected to the cp2102 by installin g shorting blocks on header j14. the sh orting block positi ons for connecting each of these signals to the cp2102 are listed in table 3 . to use this interface, th e usb-to-uart device drivers should be installed as descr ibed in section 4.3. "cp2 10x usb to uart vcp driver installation?" on page 3. 7.7. lin interface and network (j12, j14, tb1) both mcus on the target board are connected to lin transceivers through headers. these headers assume that the mcu?s crossbars are configured to put the lin tx and rx pins on port pins p1.0 and p1.1 respectively. see the c8051f54x data sheet for crossbar configuration. th e c8051f540 (side a) is connected to the t1 transceiver through the j14 header and the c8051f542 (side b) is co nnected to the t2 transceiver through the j12 header. the two lin transceivers are connecte d to each other and form a lin netw ork. other external devices can be connected to the lin network through the tb1 interface. th e tb1 interface also provides the option for connecting an external power source so that a ll lin transceivers can use the same source voltage. this source voltage can also be used to power the target board. if an external vo ltage source is not provided, the lin transceivers use the 12 v provided through the p1 power adapter connector. see section 7.2. for more power option details. the shorting block positions for connecting the mcus to the lin transceivers are listed in table 4. the pin connections for the external lin devices are listed in table 5. table 3. serial interface header (j14) description header pins uart0 pin description j14[3?4] uart_tx (p0.4_a) j14[1?2] uart_rx (p0.5_a) table 4. lin interface headers (j12 and j14) description header pins lin0 pin description j14[5?6] lin_tx (p1.0_a) j14[7?8] lin_rx (p1.1_a) j12[3?3] lin_tx (p1.0_b) j12[1?2] lin_rx (p1.1_b) table 5. tb1 external lin interface header description pin # pin description 1g n d 2l i n _ o u t 3+ l i n _ v
c8051f540dk rev. 0.1 13 7.8. port i/o conn ectors (j1-j3 and j5-j7) each of the parallel ports of the c8051f540 (side a) and c8051f542 (side b) has its own 10-pin header connector. each connector provides a pin for the correspo nding port pins 0?7, +5 v vio, and digital ground. the same pin-out is used for all of the port connectors. port 2 on the c8051f542 (side b) mcu has only two pins and has a reduced header. 7.9. voltage reference (vre f) connectors (j13 and j19) the vref connectors can be used to connect the vref pin from the mcu (p0.0) to external 0.1 f and 4.7 f decoupling capacitors. the c8051f540 (side a) device is connected to the capacitors through the j13 header and the c8051f542 (side b) device connects to its own set of capacitors through j19. 7.10. potentiometer (j17) the c8051f540 (side a) device has the option to connect port pin p1.2 to a 10k linear potentiometer. the potentiometer is connected through the j17 header. the po tentiometer can be used for testing the analog-to-digital (adc) converter of the mcu. table 6. port i/o connector pin description pin # pin description 1p n . 0 2p n . 1 3p n . 2 4p n . 3 5p n . 4 6p n . 5 7p n . 6 8p n . 7 9 +5v (vio) 10 gnd (ground) table 7. port i/o connector pin description (j7) pin # pin description 1p n . 0 2p n . 1 3 +5v (vio) 4 gnd (ground)
c8051f540dk 14 rev. 0.1 7.11. power supply i/o (side a) (tb3) all of the c8051f540 target device?s supply pins are conne cted to the tb3 terminal block. refer to table 8 for the tb3 terminal block connections. 7.12. alternate power su pply headers (j15, j18) the c8051f540 target board includes two headers that allow for alternate power sources and power measurement. header j15 connects the vio voltage supplied to the side a mcu to other peripherals on the board, such as the p1.4_sw push-button switch pull-up, and the r17 potentiometer source. to enable current measurement, the shorting block on j15 can be removed so that the vio_a node only powers the vio pin on the mcu. another voltage source will need to be applied to the vio_src node to po wer the other peripherals. header j18 connects the p4 power-adapter supply to the v_high node, which is used as the power source for the lin transceivers (t1, t2). the shorting block on header j18 can be removed to force the lin transceivers to use the voltage supply externally supplied on the +lin_v pin on the tb1 header. 7.13. c2 pin sharing on the c8051f540 (side a), the debug pins c2ck and c2d are shared with the pins rst and p2.1, respectively. on the c8051f542 (side b), the debug pins c2ck and c2d are shared with the pins rst and p2.1, respectively. the target board includes the resistors necessary to enable pin sharing which allow the pin?shared pins (rst and p3.0) to be used normally while simultaneously debugging the device. see application note ?an124: pin sharing techniques for the c2 interface? at www.silabs.com for more information regarding pin sharing. table 8. tb3 terminal block pin descriptions pin # description 1v i o _ a 2 vregin_a 3 vdd_a 4v d d a _ a 5g n d a _ a 6g n d
c8051f540dk rev. 0.1 15 7.14. target board pin assignment summary some gpio pins of the c8051f540 mcu can have an alternate fixed function. for example, pin 30 on the c8051f540 mcu is designated p0.4, and can be used as a gpio pin. also, if the uart0 peripheral on the mcu is enabled using the crossbar registers, the tx signal is rout ed to this pin. this is sh own in the "alternate fixed function" column. the "target board function" column show s that this pin is used as tx on the c8051f540 target board. the "relevant headers" column shows that this sig nal is routed to pin 6 of the j14 header and pin 6 of the j1 header. more details can be found in the c8051f54x data sheet. some of the gpio pins of the c8051f540 have been used for various functions on the target board. table 9 summarizes the c8051f540 mcu (side a) pin assignments on the target board, and also shows the various headers as sociated with each signal. table 9. c8051f540 target board pin assignments and headers mcu pin name pin# primary function alternate fixed function target board function relevant headers p0.0 8 p0.0 vref vref j1[1], j13[1] p0.1 1 p0.1 cnvstr cnvstr j1[2] p0.2 32 p0.2 xtal1 xtal1 j1[3]*, j9[2] p0.3 31 p0.3 xtal2 xtal2 j1[4]*, j10[2] p0.4 30 p0.4 uart_tx tx_mcu j1[5], j14[6] p0.5 29 p0.5 uart_rx rx_mcu j1[6], j14[8] p0.6 28 p0.6 j1[7] p0.7 27 p0.7 j1[8] p1.0 26 p1.0 lin_tx j2[1], j14[4] p1.1 25 p1.1 lin_rx j2[2], j14[2] p1.2 24 p1.2 potentiometer j2[3], j17[2] p1.3 23 p1.3 led j2[4], j16[1] p1.4 22 p1.4 switch j2[5], j16[3] p1.5 21 p1.5 gpio j2[6] p1.6 20 p1.6 gpio j2[7] p1.7 19 p1.7 gpio j2[8] p2.0 18 p2.0 gpio j3[1] p2.1 17 p2.1 gpio j3[2] p2.2 16 p2.2 gpio j3[3] p2.3 15 p2.3 gpio j3[4] p2.4 14 p2.4 gpio j3[5] p2.5 13 p2.5 gpio j3[6] p2.6 12 p2.6 gpio j3[7] p2.7 11 p2.7 gpio j3[8]
c8051f540dk 16 rev. 0.1 p3.0 9 p3.0 c2d test point near p2 rst /c2ck 12 rst c2ck rst /c2ck p2[7], p2[5]* vio 2 vio vio j8[1], j15[2], tb3[1] j1-j3[2] vregin 3 vregin vregin j8[3], tb3[2] vdd 4 vdd vdd tb3[3] vdda 5 vdda vdda tb3[4] gnd 6 gnd gnd j1-j3[1], tb3[6] gnda 7 gnda vdd tb3[5] *note: headers denoted by this symbol are not directly connected to the mcu pin; the connection might be via one or more headers and/or pin-sharing resistor(s ). see board schematic for details. table 9. c8051f540 target board pin assignments and headers (continued) mcu pin name pin# primary function alternate fixed function target board function relevant headers
c8051f540dk rev. 0.1 17 8. schematics figure 5. c8051f540 target board schematic (page 1 of 4)
c8051f540dk 18 rev. 0.1 figure 6. c8051f540 target board schematic (page 2 of 4)
c8051f540dk rev. 0.1 19 figure 7. c8051f540 target board schematic (page 3 of 4)
c8051f540dk 20 rev. 0.1 figure 8. c8051f540 target board schematic (page 4 of 4)
c8051f540dk rev. 0.1 21 n otes :
c8051f540dk 22 rev. 0.1 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 please visit the silicon labs technical support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. the information in this document is believed to be accurate in all respects at the time of publ ication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and omissions, and disclaims responsibi lity for any consequences resu lting from the use of information included herein. ad ditionally, silicon laboratorie s assumes no responsibility for the functioning of und escribed features or parameters. silicon laboratories reserves the right to make changes without further notice . silicon laboratories makes no wa rranty, rep- resentation or guarantee regarding the suitability of its products for any particular purpose, nor does silicon laboratories as sume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including wi thout limitation conse- quential or incidental damages. silicon laborat ories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of t he silicon laboratories product could create a s ituation where per- sonal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unauthor ized ap- plication, buyer shall indemnify and hold silicon laboratories harmles s against all claims and damages.

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